this course is a computer architecture.
CS370 – Quiz #1
DUE Monday, Sept. 25th – Canvas
1. Solve for each processor below:
Clock Rate
# of Instructions
Time
P1
2 Ghz
20 * 10^9
7s
P2
1.5 Ghz
30 * 10^9
10s
P3
3 Ghz
90 * 10^9
9s
a. Solve for each processor’s IPS (Instructions per second).
b. Provide a new clock rate value for P2, such that its program execution time is
reduced to 7s.
c. Provide a new number of instructions for P2, such that its program execution
time is reduced to 9s. (for 1c., clock rate remains 1.5 Ghz)
2. Translate the following code to MIPS.
Register $s1 contains variable i
Register $s2 contains variable j
if (i == j)
i++;
else
j–;
j += i;
Extra Credit Question 3
3. Resolve all of the RAW (Read after write) errors in the following pipeline. Draw the final
pipeline after resolving the issues with proper stalls, assuming no forwarding.
Each instruction has 5 stages: IF, ID, EX, ME, WB
You can denote a stall with an asterisk *
Cycle
0
1
2
3
4
add r1,
r2, r3
IF
ID
EX
ME
WB
IF
ID
EX
ME
WB
IF
ID
EX
ME
WB
IF
ID
EX
ME
WB
IF
ID
EX
ME
sub r4,
r1, r5
lw r7, r6,
10
addi r1,
r4, 1
bne s1,
s2, L1
5
6
7
8
WB
9
10
11
12
13
